IRPLCFL5E
When power is turned on, the IR2520D goes into Under Voltage Lockout (UVLO) mode.
The UVLO mode is designed to maintain a very low (<200uA) supply current and to guarantee that
the IC is fully functional before the high- and low-side output drivers are activated. During UVLO,
the high- and low-side driver outputs (LO and HO) are both low and pin VCO is pulled down to COM
for resetting the starting frequency to the maximum.
Once VCC reaches the startup threshold (UVLO+), the IR2520D turns on and the half-bridge FETs
start to oscillate. The IC goes into Frequency Sweep Mode. At startup, VCO is 0V and the fre-
quency is very high (about 2.5 times fmin). This minimizes voltage spikes and lamp flash at startup.
The frequency ramps down towards the resonant frequency of the high-Q ballast output stage,
causing the lamp voltage and lamp current to increase. During this time, the filaments of the lamp
are pre-heated to the emission temperature to guarantee a long lamp life. The frequency keeps
decreasing until the lamp ignites. If the lamp ignites successfully, the IR2520D enters RUN Mode. If
the minimum frequency has been chosen below or very close to the resonant frequency, the IC will
work near resonance and will adjust the frequency continuously to maintain ZVS at the half-bridge
and to minimize the losses in the FETs. If the minimum frequency has been chosen higher than the
resonant frequency the IR2520D will work at the minimum frequency. Figure 6.2 shows the current
across the resonant inductor and the voltage across the lamp filaments at startup.
Figure 6.2: Voltage across the lamp filaments (yellow) and current in the resonant inductor
(green) at startup
6
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